Health Monitoring Command Interface
Get Health Status
The API exposes a get_health_status command which returns an overview snapshot of tile health.
- TileHealthMonitor.get_health_status(**kwargs)[source]
Returns the current value of TPM monitoring points. If not arguments are given, the current value of all monitoring points if returned.
It is possible to filter the monitoring points requested using keyword arguments. Monitoring points can be categoried using keyword arguments using the
define_monitoring_point_filter()method. By default one filter is pre-definedgroup
temperaturesvoltagescurrentsalarmsadcstimingclocksclock_managersppspll
iojesd_interfaceddr_interfacef2f_interfaceudp_interfacedata_router
dsptile_beamfstation_beamfmax_broadband_rfi
Example:
>>> tile.get_health_status() { "temperatures": { "board": 37.5, "FPGA0": 45.0, "FPGA1": 45.0, "ADC0": 45.0, "ADC1": 45.0, "ADC2": 45.0, "ADC3": 45.0, "ADC4": 45.0, "ADC5": 45.0, "ADC6": 45.0, "ADC7": 45.0, "ADC8": 45.0, "ADC9": 45.0, "ADC10": 45.0, "ADC11": 45.0, "ADC12": 45.0, "ADC13": 45.0, "ADC14": 45.0, "ADC15": 45.0 }, "voltages": { "MGT_AVCC": 0.89, "MGT_AVTT": 1.18, "SW_AVDD1": 1.09, "SW_AVDD2": 2.3, "AVDD3": 2.5, "MAN_1V2": 1.2, "DDR0_VREF": 0.6, "DDR1_VREF": 0.6, "VM_DRVDD": 1.8, "VIN": 12.0, "MON_3V3": 3.69, "MON_1V8": 2.0, "MON_5V0": 5.0, "VM_AGP0": 0.92, "VM_AGP1": 0.92, "VM_AGP2": 0.92, "VM_AGP3": 0.92, "VM_CLK0B": 3.3, "VM_DDR0_VTT": 0.6, "VM_FE0": 3.5, "VM_MGT0_AUX": 1.8, "VM_PLL": 3.3, "VM_AGP4": 0.92, "VM_AGP5": 0.92, "VM_AGP6": 0.92, "VM_AGP7": 0.92, "VM_CLK1B": 3.3, "VM_DDR1_VDD": 1.2, "VM_DDR1_VTT": 0.6, "VM_DVDD": 1.1, "VM_FE1": 3.5, "VM_MGT1_AUX": 1.8, "VM_SW_AMP": 3.5 }, "currents": { "FE0_mVA": 1.31, "FE1_mVA": 1.31 }, "alarms": { "I2C_access_alm": 0, "temperature_alm": 0, "voltage_alm": 0, "SEM_wd": 0, "MCU_wd": 0 }, "adcs": { "pll_status": { "ADC0": [ true, true ], "ADC1": [ true, true ], "ADC2": [ true, true ], "ADC3": [ true, true ], "ADC4": [ true, true ], "ADC5": [ true, true ], "ADC6": [ true, true ], "ADC7": [ true, true ], "ADC8": [ true, true ], "ADC9": [ true, true ], "ADC10": [ true, true ], "ADC11": [ true, true ], "ADC12": [ true, true ], "ADC13": [ true, true ], "ADC14": [ true, true ], "ADC15": [ true, true ] }, "sysref_timing_requirements": { "ADC0": true, "ADC1": true, "ADC2": true, "ADC3": true, "ADC4": true, "ADC5": true, "ADC6": true, "ADC7": true, "ADC8": true, "ADC9": true, "ADC10": true, "ADC11": true, "ADC12": true, "ADC13": true, "ADC14": true, "ADC15": true }, "sysref_counter": { "ADC0": true, "ADC1": true, "ADC2": true, "ADC3": true, "ADC4": true, "ADC5": true, "ADC6": true, "ADC7": true, "ADC8": true, "ADC9": true, "ADC10": true, "ADC11": true, "ADC12": true, "ADC13": true, "ADC14": true, "ADC15": true } }, "timing": { "clocks": { "FPGA0": { "JESD": true, "DDR": true, "UDP": true }, "FPGA1": { "JESD": true, "DDR": true, "UDP": true } }, "clock_managers": { "FPGA0": { "C2C_MMCM": [ true, 0 ], "JESD_MMCM": [ true, 0 ], "DSP_MMCM": [ true, 0 ] }, "FPGA1": { "C2C_MMCM": [ true, 0 ], "JESD_MMCM": [ true, 0 ], "DSP_MMCM": [ true, 0 ] } }, "timestamp": { "FPGA0": 15, "FPGA1": 15 }, "pps": { "status": true }, "pll": [ true, 0 ], "pll_40g": [ true, 0 ] }, "io": { "jesd_interface": { "link_status": true, "lane_error_count": { "FPGA0": { "Core0": { "lane0": 0, "lane1": 0, "lane2": 0, "lane3": 0, "lane4": 0, "lane5": 0, "lane6": 0, "lane7": 0 }, "Core1": { "lane0": 0, "lane1": 0, "lane2": 0, "lane3": 0, "lane4": 0, "lane5": 0, "lane6": 0, "lane7": 0 } }, "FPGA1": { "Core0": { "lane0": 0, "lane1": 0, "lane2": 0, "lane3": 0, "lane4": 0, "lane5": 0, "lane6": 0, "lane7": 0 }, "Core1": { "lane0": 0, "lane1": 0, "lane2": 0, "lane3": 0, "lane4": 0, "lane5": 0, "lane6": 0, "lane7": 0 } } }, "lane_status": true, "resync_count": { "FPGA0": 0, "FPGA1": 0 }, "qpll_status": { "FPGA0": [ true, 0 ], "FPGA1": [ true, 0 ] } }, "ddr_interface": { "initialisation": true, "reset_counter": { "FPGA0": 0, "FPGA1": 0 }, "rd_cnt": { "FPGA0": 15, "FPGA1": 15 }, "wr_cnt": { "FPGA0": 15, "FPGA1": 15 }, "rd_dat_cnt": { "FPGA0": 15, "FPGA1": 15 } }, "f2f_interface": { "pll_status": [ true, 0 ], "soft_error": 0, "hard_error": 0 }, "udp_interface": { "arp": true, "status": true, "crc_error_count": { "FPGA0": 0, "FPGA1": 0 }, "bip_error_count": { "FPGA0": { "lane0": 0, "lane1": 0, "lane2": 0, "lane3": 0 }, "FPGA1": { "lane0": 0, "lane1": 0, "lane2": 0, "lane3": 0 } }, "decode_error_count": { "FPGA0": { "lane0": 0, "lane1": 0, "lane2": 0, "lane3": 0 }, "FPGA1": { "lane0": 0, "lane1": 0, "lane2": 0, "lane3": 0 } }, "linkup_loss_count": { "FPGA0": 0, "FPGA1": 0 } }, "data_router": { "status": { "FPGA0": 0, "FPGA1": 0 }, "discarded_packets": { "FPGA0": [ 0, 0 ], "FPGA1": [ 0, 0 ] } } }, "dsp": { "tile_beamf": true, "station_beamf": { "status": true, "discarded_or_flagged_packet_count": { "FPGA0": 0, "FPGA1": 0 }, "ddr_parity_error_count": { "FPGA0": 0, "FPGA1": 0 }, "dsp_latency_error": true }, "max_broadband_rfi": 32767 } }
Example Filtering:
>>> tile.get_health_status(group='temperatures') { "temperatures": { "board": 56.25, "FPGA0": 60.77, "FPGA1": 59.04, "ADC0": 60.33, "ADC1": 61.87, "ADC2": 62.82, "ADC3": 64.54, "ADC4": 64.76, "ADC5": 63.42, "ADC6": 63.36, "ADC7": 63.26, "ADC8": 64.42, "ADC9": 63.27, "ADC10": 63.74, "ADC11": 64.39, "ADC12": 64.49, "ADC13": 62.9, "ADC14": 62.24, "ADC15": 60.87 } }
Some monitoring points reflect a live measurement or state, for example, voltages, temperatures and ARP status. These are either continuous readings or quantities that update slow enough they can be reliably read from software without being cached in firmware. Other monitoring points including most FPGA IO and DSP error counters are cached in firmware between calls to
get_health_status. In these cases results are fetched and then the cached value is also cleared. The result is that polling get_health_status returns only changes since that last poll. Below is a high level summary of which monitoring points are cleared on each poll.Summary of which monitoring points are cleared when read
See the full documentation provided on each monitoring point to find a rationale for all those which are not cleared.
- Parameters:
kwargs (dict) – keyword arguments to filter health status fetched
- Returns:
Health status
- Return type:
dict
Define Monitoring Point Filter
The API also exposes a define_monitoring_point_filter command to allow the user to create custom keyword argument based filters for the information returned by get_health_status. This allows upstream software complete control over the categorisation and polling frequency of each monitoring point.
- TileHealthMonitor.define_monitoring_point_filter(path, override=True, **kwargs)[source]
Create a custom filter to use with
get_health_status(). Filters are any custom combination of keyword arguments.This is intended to allow the upstream software to create custom groupings of monitoring points at run-time. Allowing each of these groups to be polled at different intervals.
As mentioned above in
get_health_status(), one set of filters is pre-defined with the keygroup.Example Filtering:
>>> tile.get_health_status(group='temperatures') { "temperatures": { "board": 56.25, "FPGA0": 60.77, "FPGA1": 59.04, "ADC0": 60.33, "ADC1": 61.87, "ADC2": 62.82, "ADC3": 64.54, "ADC4": 64.76, "ADC5": 63.42, "ADC6": 63.36, "ADC7": 63.26, "ADC8": 64.42, "ADC9": 63.27, "ADC10": 63.74, "ADC11": 64.39, "ADC12": 64.49, "ADC13": 62.9, "ADC14": 62.24, "ADC15": 60.87 } }
Monitoring points to be included can be specified by a path, a string name produced from
.delimited keys of the lookup dict. Some examples includeio.udp_interface.crc_error_count','io.udp_interface','timing'or'io'. All available options are returned fromall_monitoring_categories()see below.Example 1, to create and use a filter to poll only the TPM IO’s UDP interface CRC error counters for both FPGAs. The path for these would be
io.udp_interface.crc_error_count.FPGA0andio.udp_interface.crc_error_count.FPGA1so a filter can be created using their exclusive common parentio.udp_interface.crc_error_count:>>> tile.define_monitoring_point_filter('io.udp_interface.crc_error_count', new_custom_key=87) [INFO]: Setting new_custom_key for io.udp_interface.crc_error_count.FPGA0 to 87. [INFO]: Setting new_custom_key for io.udp_interface.crc_error_count.FPGA1 to 87. >>> tile.get_health_status(new_custom_key=87) { "io": { "udp_interface": { "crc_error_count": { "FPGA0": 0, "FPGA1": 0 } } } }
Any keyword argument combination can be used, here an arbitrary
new_custom_key=87has been used.Example 2, to create and use a filter for only the TPM DDR termination voltages and DDR interface reset counter. The path for these would be
'voltages.VM_DDR0_VTT','voltages.VM_DDR1_VTT','io.ddr_interface.reset_counter.FPGA0'and'io.ddr_interface.reset_counter.FPGA1'so a filter can be created using'voltages.VM_DDR0_VTT','voltages.VM_DDR1_VTT'and'io.ddr_interface.reset_counter':>>> tile.define_monitoring_point_filter('voltages.VM_DDR0_VTT', second_custom_key='ddr') [INFO]: Setting second_custom_key for voltages.VM_DDR0_VTT to ddr. >>> tile.define_monitoring_point_filter('voltages.VM_DDR1_VTT', second_custom_key='ddr') [INFO]: Setting second_custom_key for voltages.VM_DDR1_VTT to ddr. >>> tile.define_monitoring_point_filter('io.ddr_interface.reset_counter', second_custom_key='ddr') [INFO]: Setting second_custom_key for io.ddr_interface.reset_counter.FPGA0 to ddr. [INFO]: Setting second_custom_key for io.ddr_interface.reset_counter.FPGA1 to ddr. >>> tile.get_health_status(second_custom_key='ddr') { "voltages": { "VM_DDR0_VTT": 0.604, "VM_DDR1_VTT": 0.605 }, "io": { "ddr_interface": { "reset_counter": { "FPGA0": 0, "FPGA1": 0 } } } }
Example 3, to create and use a custom filter called rate with string values:
>>> tile.define_monitoring_point_filter('alarms', rate="fast") [INFO]: Setting rate for alarms to fast. >>> tile.define_monitoring_point_filter('voltages', rate="slow") [INFO]: Setting rate for voltages.MGT_AVCC to slow. [INFO]: Setting rate for voltages.MGT_AVTT to slow. [INFO]: Setting rate for voltages.SW_AVDD1 to slow. [INFO]: Setting rate for voltages.SW_AVDD2 to slow. [INFO]: Setting rate for voltages.AVDD3 to slow. [INFO]: Setting rate for voltages.MAN_1V2 to slow. [INFO]: Setting rate for voltages.DDR0_VREF to slow. [INFO]: Setting rate for voltages.DDR1_VREF to slow. [INFO]: Setting rate for voltages.VM_DRVDD to slow. [INFO]: Setting rate for voltages.VIN to slow. [INFO]: Setting rate for voltages.MON_3V3 to slow. [INFO]: Setting rate for voltages.MON_1V8 to slow. [INFO]: Setting rate for voltages.MON_5V0 to slow. [INFO]: Setting rate for voltages.VM_AGP0 to slow. [INFO]: Setting rate for voltages.VM_AGP1 to slow. [INFO]: Setting rate for voltages.VM_AGP2 to slow. [INFO]: Setting rate for voltages.VM_AGP3 to slow. [INFO]: Setting rate for voltages.VM_CLK0B to slow. [INFO]: Setting rate for voltages.VM_DDR0_VTT to slow. [INFO]: Setting rate for voltages.VM_FE0 to slow. [INFO]: Setting rate for voltages.VM_MGT0_AUX to slow. [INFO]: Setting rate for voltages.VM_PLL to slow. [INFO]: Setting rate for voltages.VM_AGP4 to slow. [INFO]: Setting rate for voltages.VM_AGP5 to slow. [INFO]: Setting rate for voltages.VM_AGP6 to slow. [INFO]: Setting rate for voltages.VM_AGP7 to slow. [INFO]: Setting rate for voltages.VM_CLK1B to slow. [INFO]: Setting rate for voltages.VM_DDR1_VDD to slow. [INFO]: Setting rate for voltages.VM_DDR1_VTT to slow. [INFO]: Setting rate for voltages.VM_DVDD to slow. [INFO]: Setting rate for voltages.VM_FE1 to slow. [INFO]: Setting rate for voltages.VM_MGT1_AUX to slow. [INFO]: Setting rate for voltages.VM_SW_AMP to slow. >>> tile.get_health_status(rate="fast") { "alarms": { "I2C_access_alm": 0, "temperature_alm": 0, "voltage_alm": 0, "SEM_wd": 0, "MCU_wd": 0 } } >>> tile.get_health_status(rate="slow") { "voltages": { "MGT_AVCC": 0.889, "MGT_AVTT": 1.15, "SW_AVDD1": 1.082, "SW_AVDD2": 2.295, "AVDD3": 2.499, "MAN_1V2": 1.202, "DDR0_VREF": 0.595, "DDR1_VREF": 0.595, "VM_DRVDD": 1.804, "VIN": 11.922, "MON_3V3": 3.691, "MON_1V8": 2.02, "MON_5V0": 4.944, "VM_AGP0": 0.916, "VM_AGP1": 0.916, "VM_AGP2": 0.919, "VM_AGP3": 0.917, "VM_CLK0B": 3.309, "VM_DDR0_VTT": 0.605, "VM_FE0": 3.525, "VM_MGT0_AUX": 1.783, "VM_PLL": 3.307, "VM_AGP4": 0.917, "VM_AGP5": 0.915, "VM_AGP6": 0.92, "VM_AGP7": 0.915, "VM_CLK1B": 3.309, "VM_DDR1_VDD": 1.196, "VM_DDR1_VTT": 0.604, "VM_DVDD": 1.096, "VM_FE1": 3.524, "VM_MGT1_AUX": 1.8, "VM_SW_AMP": 3.522 } } >>> tile.define_monitoring_point_filter('alarms', rate="slow", override=False) [INFO]: Appending rate for alarms with slow. [INFO]: rate for alarms now ['slow', 'fast']. >>> tile.get_health_status(rate="slow") { "voltages": { "MGT_AVCC": 0.89, "MGT_AVTT": 1.15, "SW_AVDD1": 1.081, "SW_AVDD2": 2.295, "AVDD3": 2.499, "MAN_1V2": 1.202, "DDR0_VREF": 0.595, "DDR1_VREF": 0.595, "VM_DRVDD": 1.812, "VIN": 11.891, "MON_3V3": 3.652, "MON_1V8": 2.013, "MON_5V0": 4.929, "VM_AGP0": 0.916, "VM_AGP1": 0.915, "VM_AGP2": 0.918, "VM_AGP3": 0.916, "VM_CLK0B": 3.305, "VM_DDR0_VTT": 0.604, "VM_FE0": 3.523, "VM_MGT0_AUX": 1.782, "VM_PLL": 3.304, "VM_AGP4": 0.917, "VM_AGP5": 0.915, "VM_AGP6": 0.92, "VM_AGP7": 0.915, "VM_CLK1B": 3.309, "VM_DDR1_VDD": 1.195, "VM_DDR1_VTT": 0.605, "VM_DVDD": 1.096, "VM_FE1": 3.525, "VM_MGT1_AUX": 1.8, "VM_SW_AMP": 3.522 }, "alarms": { "I2C_access_alm": 0, "temperature_alm": 0, "voltage_alm": 0, "SEM_wd": 0, "MCU_wd": 0 } }
The above example defines a rate filter which allows alarm status to be read with
rate="fast"and additionally alarm status and voltages to be read withrate="slow". By default, the provided value for a keyword argument will override any existing filter defined. To instead append values, useoverride=False.- Parameters:
path (str) – Monitoring point path (e.g.
'io.udp_interface.crc_error_count','io.udp_interface','timing','io')override (bool) – Overrides all values for the provided keyword if True, if False, the value is appended to any previous values for that key.
kwargs (dict (values can be any immutable type or list of)) – keyword arguments to filter health status fetched
Helper Methods
- TileHealthMonitor.all_monitoring_points()[source]
Returns a list of all monitoring points by finding all leaf nodes in the lookup dict that have a corresponding method field.
The monitoring points returned are strings produced from
.delimited keys. For example:'voltages.5V0','io.udp_interface.crc_error_count.FPGA0'Example:
>>> tile.all_monitoring_points() [ "temperatures.board", "temperatures.FPGA0", "temperatures.FPGA1", "temperatures.ADC0", "temperatures.ADC1", "temperatures.ADC2", "temperatures.ADC3", "temperatures.ADC4", "temperatures.ADC5", "temperatures.ADC6", "temperatures.ADC7", "temperatures.ADC8", "temperatures.ADC9", "temperatures.ADC10", "temperatures.ADC11", "temperatures.ADC12", "temperatures.ADC13", "temperatures.ADC14", "temperatures.ADC15", "voltages.MGT_AVCC", "voltages.MGT_AVTT", "voltages.SW_AVDD1", "voltages.SW_AVDD2", "voltages.AVDD3", "voltages.MAN_1V2", "voltages.DDR0_VREF", "voltages.DDR1_VREF", "voltages.VM_DRVDD", "voltages.VIN", "voltages.MON_3V3", "voltages.MON_1V8", "voltages.MON_5V0", "voltages.VM_AGP0", "voltages.VM_AGP1", "voltages.VM_AGP2", "voltages.VM_AGP3", "voltages.VM_CLK0B", "voltages.VM_DDR0_VTT", "voltages.VM_FE0", "voltages.VM_MGT0_AUX", "voltages.VM_PLL", "voltages.VM_AGP4", "voltages.VM_AGP5", "voltages.VM_AGP6", "voltages.VM_AGP7", "voltages.VM_CLK1B", "voltages.VM_DDR1_VDD", "voltages.VM_DDR1_VTT", "voltages.VM_DVDD", "voltages.VM_FE1", "voltages.VM_MGT1_AUX", "voltages.VM_SW_AMP", "currents.FE0_mVA", "currents.FE1_mVA", "alarms", "adcs.pll_status.ADC0", "adcs.pll_status.ADC1", "adcs.pll_status.ADC2", "adcs.pll_status.ADC3", "adcs.pll_status.ADC4", "adcs.pll_status.ADC5", "adcs.pll_status.ADC6", "adcs.pll_status.ADC7", "adcs.pll_status.ADC8", "adcs.pll_status.ADC9", "adcs.pll_status.ADC10", "adcs.pll_status.ADC11", "adcs.pll_status.ADC12", "adcs.pll_status.ADC13", "adcs.pll_status.ADC14", "adcs.pll_status.ADC15", "adcs.sysref_timing_requirements.ADC0", "adcs.sysref_timing_requirements.ADC1", "adcs.sysref_timing_requirements.ADC2", "adcs.sysref_timing_requirements.ADC3", "adcs.sysref_timing_requirements.ADC4", "adcs.sysref_timing_requirements.ADC5", "adcs.sysref_timing_requirements.ADC6", "adcs.sysref_timing_requirements.ADC7", "adcs.sysref_timing_requirements.ADC8", "adcs.sysref_timing_requirements.ADC9", "adcs.sysref_timing_requirements.ADC10", "adcs.sysref_timing_requirements.ADC11", "adcs.sysref_timing_requirements.ADC12", "adcs.sysref_timing_requirements.ADC13", "adcs.sysref_timing_requirements.ADC14", "adcs.sysref_timing_requirements.ADC15", "adcs.sysref_counter.ADC0", "adcs.sysref_counter.ADC1", "adcs.sysref_counter.ADC2", "adcs.sysref_counter.ADC3", "adcs.sysref_counter.ADC4", "adcs.sysref_counter.ADC5", "adcs.sysref_counter.ADC6", "adcs.sysref_counter.ADC7", "adcs.sysref_counter.ADC8", "adcs.sysref_counter.ADC9", "adcs.sysref_counter.ADC10", "adcs.sysref_counter.ADC11", "adcs.sysref_counter.ADC12", "adcs.sysref_counter.ADC13", "adcs.sysref_counter.ADC14", "adcs.sysref_counter.ADC15", "timing.clocks.FPGA0.JESD", "timing.clocks.FPGA0.DDR", "timing.clocks.FPGA0.UDP", "timing.clocks.FPGA1.JESD", "timing.clocks.FPGA1.DDR", "timing.clocks.FPGA1.UDP", "timing.clock_managers.FPGA0.C2C_MMCM", "timing.clock_managers.FPGA0.JESD_MMCM", "timing.clock_managers.FPGA0.DSP_MMCM", "timing.clock_managers.FPGA1.C2C_MMCM", "timing.clock_managers.FPGA1.JESD_MMCM", "timing.clock_managers.FPGA1.DSP_MMCM", "timing.timestamp.FPGA0", "timing.timestamp.FPGA1", "timing.pps.status", "timing.pll", "timing.pll_40g", "io.jesd_interface.link_status", "io.jesd_interface.lane_error_count.FPGA0.Core0", "io.jesd_interface.lane_error_count.FPGA0.Core1", "io.jesd_interface.lane_error_count.FPGA1.Core0", "io.jesd_interface.lane_error_count.FPGA1.Core1", "io.jesd_interface.lane_status", "io.jesd_interface.resync_count.FPGA0", "io.jesd_interface.resync_count.FPGA1", "io.jesd_interface.qpll_status.FPGA0", "io.jesd_interface.qpll_status.FPGA1", "io.ddr_interface.initialisation", "io.ddr_interface.reset_counter.FPGA0", "io.ddr_interface.reset_counter.FPGA1", "io.ddr_interface.rd_cnt.FPGA0", "io.ddr_interface.rd_cnt.FPGA1", "io.ddr_interface.wr_cnt.FPGA0", "io.ddr_interface.wr_cnt.FPGA1", "io.ddr_interface.rd_dat_cnt.FPGA0", "io.ddr_interface.rd_dat_cnt.FPGA1", "io.f2f_interface.pll_status", "io.f2f_interface.soft_error", "io.f2f_interface.hard_error", "io.udp_interface.arp", "io.udp_interface.status", "io.udp_interface.crc_error_count.FPGA0", "io.udp_interface.crc_error_count.FPGA1", "io.udp_interface.bip_error_count.FPGA0", "io.udp_interface.bip_error_count.FPGA1", "io.udp_interface.decode_error_count.FPGA0", "io.udp_interface.decode_error_count.FPGA1", "io.udp_interface.linkup_loss_count.FPGA0", "io.udp_interface.linkup_loss_count.FPGA1", "io.data_router.status", "io.data_router.discarded_packets", "dsp.tile_beamf", "dsp.station_beamf.status", "dsp.station_beamf.discarded_or_flagged_packet_count", "dsp.station_beamf.ddr_parity_error_count", "dsp.station_beamf.dsp_latency_error", "dsp.max_broadband_rfi" ]
- Returns:
list of monitoring points
- Return type:
list of str
- TileHealthMonitor.all_monitoring_categories()[source]
Returns a list of all monitoring point ‘categories’. Here categories is a super-set of monitoring points and is the full list of accepted strings to
define_monitoring_point_filter(). For example, the monitoring point:io.udp_interface.crc_error_count.FPGA0would have the associated categories:'io','io.udp_interface','io.udp_interface.crc_error_count','io.udp_interface.crc_error_count.FPGA0'.Example:
>>> tile.all_monitoring_categories() [ "adcs", "adcs.pll_status", "adcs.pll_status.ADC0", "adcs.pll_status.ADC1", "adcs.pll_status.ADC10", "adcs.pll_status.ADC11", "adcs.pll_status.ADC12", "adcs.pll_status.ADC13", "adcs.pll_status.ADC14", "adcs.pll_status.ADC15", "adcs.pll_status.ADC2", "adcs.pll_status.ADC3", "adcs.pll_status.ADC4", "adcs.pll_status.ADC5", "adcs.pll_status.ADC6", "adcs.pll_status.ADC7", "adcs.pll_status.ADC8", "adcs.pll_status.ADC9", "adcs.sysref_counter", "adcs.sysref_counter.ADC0", "adcs.sysref_counter.ADC1", "adcs.sysref_counter.ADC10", "adcs.sysref_counter.ADC11", "adcs.sysref_counter.ADC12", "adcs.sysref_counter.ADC13", "adcs.sysref_counter.ADC14", "adcs.sysref_counter.ADC15", "adcs.sysref_counter.ADC2", "adcs.sysref_counter.ADC3", "adcs.sysref_counter.ADC4", "adcs.sysref_counter.ADC5", "adcs.sysref_counter.ADC6", "adcs.sysref_counter.ADC7", "adcs.sysref_counter.ADC8", "adcs.sysref_counter.ADC9", "adcs.sysref_timing_requirements", "adcs.sysref_timing_requirements.ADC0", "adcs.sysref_timing_requirements.ADC1", "adcs.sysref_timing_requirements.ADC10", "adcs.sysref_timing_requirements.ADC11", "adcs.sysref_timing_requirements.ADC12", "adcs.sysref_timing_requirements.ADC13", "adcs.sysref_timing_requirements.ADC14", "adcs.sysref_timing_requirements.ADC15", "adcs.sysref_timing_requirements.ADC2", "adcs.sysref_timing_requirements.ADC3", "adcs.sysref_timing_requirements.ADC4", "adcs.sysref_timing_requirements.ADC5", "adcs.sysref_timing_requirements.ADC6", "adcs.sysref_timing_requirements.ADC7", "adcs.sysref_timing_requirements.ADC8", "adcs.sysref_timing_requirements.ADC9", "alarms", "currents", "currents.FE0_mVA", "currents.FE1_mVA", "dsp", "dsp.max_broadband_rfi", "dsp.station_beamf", "dsp.station_beamf.ddr_parity_error_count", "dsp.station_beamf.discarded_or_flagged_packet_count", "dsp.station_beamf.dsp_latency_error", "dsp.station_beamf.status", "dsp.tile_beamf", "io", "io.data_router", "io.data_router.discarded_packets", "io.data_router.status", "io.ddr_interface", "io.ddr_interface.initialisation", "io.ddr_interface.rd_cnt", "io.ddr_interface.rd_cnt.FPGA0", "io.ddr_interface.rd_cnt.FPGA1", "io.ddr_interface.rd_dat_cnt", "io.ddr_interface.rd_dat_cnt.FPGA0", "io.ddr_interface.rd_dat_cnt.FPGA1", "io.ddr_interface.reset_counter", "io.ddr_interface.reset_counter.FPGA0", "io.ddr_interface.reset_counter.FPGA1", "io.ddr_interface.wr_cnt", "io.ddr_interface.wr_cnt.FPGA0", "io.ddr_interface.wr_cnt.FPGA1", "io.f2f_interface", "io.f2f_interface.hard_error", "io.f2f_interface.pll_status", "io.f2f_interface.soft_error", "io.jesd_interface", "io.jesd_interface.lane_error_count", "io.jesd_interface.lane_error_count.FPGA0", "io.jesd_interface.lane_error_count.FPGA0.Core0", "io.jesd_interface.lane_error_count.FPGA0.Core1", "io.jesd_interface.lane_error_count.FPGA1", "io.jesd_interface.lane_error_count.FPGA1.Core0", "io.jesd_interface.lane_error_count.FPGA1.Core1", "io.jesd_interface.lane_status", "io.jesd_interface.link_status", "io.jesd_interface.qpll_status", "io.jesd_interface.qpll_status.FPGA0", "io.jesd_interface.qpll_status.FPGA1", "io.jesd_interface.resync_count", "io.jesd_interface.resync_count.FPGA0", "io.jesd_interface.resync_count.FPGA1", "io.udp_interface", "io.udp_interface.arp", "io.udp_interface.bip_error_count", "io.udp_interface.bip_error_count.FPGA0", "io.udp_interface.bip_error_count.FPGA1", "io.udp_interface.crc_error_count", "io.udp_interface.crc_error_count.FPGA0", "io.udp_interface.crc_error_count.FPGA1", "io.udp_interface.decode_error_count", "io.udp_interface.decode_error_count.FPGA0", "io.udp_interface.decode_error_count.FPGA1", "io.udp_interface.linkup_loss_count", "io.udp_interface.linkup_loss_count.FPGA0", "io.udp_interface.linkup_loss_count.FPGA1", "io.udp_interface.status", "temperatures", "temperatures.ADC0", "temperatures.ADC1", "temperatures.ADC10", "temperatures.ADC11", "temperatures.ADC12", "temperatures.ADC13", "temperatures.ADC14", "temperatures.ADC15", "temperatures.ADC2", "temperatures.ADC3", "temperatures.ADC4", "temperatures.ADC5", "temperatures.ADC6", "temperatures.ADC7", "temperatures.ADC8", "temperatures.ADC9", "temperatures.FPGA0", "temperatures.FPGA1", "temperatures.board", "timing", "timing.clock_managers", "timing.clock_managers.FPGA0", "timing.clock_managers.FPGA0.C2C_MMCM", "timing.clock_managers.FPGA0.DSP_MMCM", "timing.clock_managers.FPGA0.JESD_MMCM", "timing.clock_managers.FPGA1", "timing.clock_managers.FPGA1.C2C_MMCM", "timing.clock_managers.FPGA1.DSP_MMCM", "timing.clock_managers.FPGA1.JESD_MMCM", "timing.clocks", "timing.clocks.FPGA0", "timing.clocks.FPGA0.DDR", "timing.clocks.FPGA0.JESD", "timing.clocks.FPGA0.UDP", "timing.clocks.FPGA1", "timing.clocks.FPGA1.DDR", "timing.clocks.FPGA1.JESD", "timing.clocks.FPGA1.UDP", "timing.pll", "timing.pll_40g", "timing.pps", "timing.pps.status", "timing.timestamp", "timing.timestamp.FPGA0", "timing.timestamp.FPGA1", "voltages", "voltages.AVDD3", "voltages.DDR0_VREF", "voltages.DDR1_VREF", "voltages.MAN_1V2", "voltages.MGT_AVCC", "voltages.MGT_AVTT", "voltages.MON_1V8", "voltages.MON_3V3", "voltages.MON_5V0", "voltages.SW_AVDD1", "voltages.SW_AVDD2", "voltages.VIN", "voltages.VM_AGP0", "voltages.VM_AGP1", "voltages.VM_AGP2", "voltages.VM_AGP3", "voltages.VM_AGP4", "voltages.VM_AGP5", "voltages.VM_AGP6", "voltages.VM_AGP7", "voltages.VM_CLK0B", "voltages.VM_CLK1B", "voltages.VM_DDR0_VTT", "voltages.VM_DDR1_VDD", "voltages.VM_DDR1_VTT", "voltages.VM_DRVDD", "voltages.VM_DVDD", "voltages.VM_FE0", "voltages.VM_FE1", "voltages.VM_MGT0_AUX", "voltages.VM_MGT1_AUX", "voltages.VM_PLL", "voltages.VM_SW_AMP" ]
- Returns:
list of categories
- Return type:
list of str