TpmAdc9695

Overview

This plugin is responsible for managing the TPM AD9695 ADCs.

Python Class & Methods Index

class ska_low_sps_tpm_api.plugins.adc_ad9695.TpmAdc9695(board, logger=None, **kwargs)

TpmAdc plugin

__init__(board, logger=None, **kwargs)

TpmAdc initialiser.

Parameters:

• board – Pointer to board instance

• logger – Logger instance

adc_clear_overrange()

Clear the 2 LSBs of the overrange status register of the ADC by setting the 2 LSBs HIGH in the overrange clear register

adc_configure_ddc(sampling_frequency, ddc_frequency, decimation_factor)

Configure DDC registers.

Parameters:

• sampling_frequency (float) – ADC sampling frequency in Hertz

• ddc_frequency (float) – DDC frequency in Hertz

• decimation_factor (int) – Chip decimation ratio (8, 20)

adc_enable_temp_meas(diode_type=1)

Enable temperature diode voltage on Vref Pin .

Parameters:

diode_type – select which diode export, 0=High-Z, 1=1xdiode, 2=20xdiode

adc_get_full_scale_config()

Get ADC input full-scale voltage.

Returns:

ADC input full-scale voltage (in V)

Return type:

float

adc_jesd204b_init()

JESD204B Initialization sequence.

adc_lane_remap(logical_lane_vals)

Lane remapping helper.

Parameters:

logical_lane_vals (list(int)) – List of 4 logical lane values (0 to 3) mapped to physical lanes 0 to 3

adc_pll_lock_poll()

Poll PLL lock status.

adc_read_overrange(clear=False)

Read the overrange status bits of the ADC. Optionally clear the bits afterwards Return the overrange status of the two ADC channels as two booleans

Parameters:

clear (bool) – Clears the overrange status bits after reading if set to true

Returns:

Overrange status of the two ADC channels; in the form of [CH_A, CH_B]

Return type:

list of 2 bools

adc_read_reg(address, unlock=None)

Read value from specified ADC register.

Parameters:

address (int) – ADC register address

Returns:

value stored in register

Return type:

int

adc_set_fast_detect(upper_threshold, lower_threshold=None, dwell_samples=100)

Configure and enable Fast Threshold Detection in pins FD_A and FD_B.

Parameters:

• upper_threshold (int) – Signal magnitude threshold for assertion

• lower_threshold (int) – Signal magnitude threshold for deassertion

• dwell_samples (int) – Duration below lower threshold before deassertion

adc_set_full_scale_config(fullscale_voltage)

Set ADC input full-scale voltage.

Parameters:

fullscale_voltage (float) – ADC input full-scale Voltage (in V)

adc_set_vref_high_z()

Set ADC Vref pin to High-Z

adc_single_start(mono_channel_14_bit=False, adc_test_pattern=0, mono_channel_sel=0, fullscale_voltage=1.59)

Perform the ADC configuration and initialization procedure as implemented in ADI demo

Parameters:

• mono_channel_14_bit (bool) – Use mono channel 14-bit mode

• adc_test_pattern (int) – ADC test mode option (default=0=off)

• mono_channel_sel (int) – Select mono channel (0=A, 1=B)

• fullscale_voltage (float) – ADC input full-scale voltage

adc_single_start_dual_14_ddc(sampling_frequency=800000000.0, ddc_frequency=100000000.0, adc_test_pattern=0, decimation_factor=8, low_bitrate=1, fullscale_voltage=1.59)

Perform the ADC configuration and initialization procedure as implemented in ADI demo

low_bitrate: JESD204B lane rate control 0x3 => Lane rate = 13.5 Gbps to 16 Gbps. 0x0 => Lane rate = 6.75 Gbps to 13.5 Gbps. 0x1 => Lane rate = 3.375 Gbps to 6.75 Gbps. 0x5 => Lane rate = 1.6875 Gbps to 3.375 Gbps.

Parameters:

• sampling_frequency (float) – ADC sampling frequency in Hertz

• ddc_frequency (float) – DDC frequency in Hertz

• adc_test_pattern (int) – ADC test mode option (default=0=off)

• decimation_factor (int) – Chip decimation ratio (8, 20)

• low_bitrate (bool or int) – JESD204B lane rate control option (True, False, 0x0, 0x1, 0x3, 0x5)

• fullscale_voltage (float) – ADC input full-scale voltage in volts

adc_write_reg(address, value, unlock=None)

Write value to specified ADC register.

Parameters:

• address (int) – ADC register address

• value (int) – value to write

check_pll_status()

Status of ADC PLL.

This method returns a tuple, True if the lock of the PLL is up and True if no loss of PLL lock has been observed respectively.

Returns:

(True, True) if lock is up and no loss of lock

Return type:

tuple

check_sysref_counter(show_info=True)

Checks ADC sysref counter is incrementing. Sysref counter increments for each sysref event and overflows at 255 ~ every 3.28ms.

Returns True if counter is incrementing.

Will retry for 1 second until two readings can be taken in under 3ms to guarantee no overflow.

For debugging, if show info is enabled then each counter reading will be displayed along with the elapsed time.

Parameters:

show_info (bool) – displays info messages

Returns:

True if sysref counter incrementing

Return type:

bool

check_sysref_setup_and_hold(show_info=True)

Status of the ADC setup and hold monitor. Returns True if no setup or hold error.

If show info enabled then desciptions from AD9695 documentation are also displayed to explain the value of the setup and hold monitor.

Parameters:

show_info (bool) – displays info messages about current setup/hold

Returns:

True if timing requirements OK

Return type:

bool

clean_up()

Perform cleanup.

Returns:

Success

clear_pll_status()

Clear the JESD204B PLL loss-of-lock sticky bit (register 0x1262).

Performs the two-write sequence required by the AD9695 datasheet: write 0x08 to assert the clear, then write 0x00 to return to normal operation.

disable_test_mode()

Disable AD9695 Test Mode.

enable_test_mode(pattern_type)

Configure ADC Test Mode.

The AD9695 ADC supports the following test modes:

• midscale: A constant output of the ADC midscale value.

• full-scale-positive: A constant output of the ADC positive maximum value.

• full-scale-negative: A constant output of the ADC negative maximum value.

• checkerboard: A repeating pattern of alternating 1’s and 0’s. Words alternate between 0x2AAA and 0x1555.

• pn-long: A PN23 (Pseudo-Random Noise) sequence.

• pn-short: A PN9 (Pseudo-Random Noise) sequence.

• one-zero-alternate: A repeating pattern of alternating 1’s and 0’s. Words alternate between 0x0000 and 0x3FFF.

• fixed: A repeating pattern of four user provided values. These can be specified with set_test_pattern below.

• ramp A linear ramp pattern increasing from 0x000 to 0x3FFF then repeating.

For more details see the Analog Devices AD9695 Data Sheet

Parameters:

pattern_type (str) – Name of test mode to be enabled

initialise()

Initialise TpmAdc.

set_test_pattern(pattern=[15, 67, 252, 128])

Configure ADC Test Pattern User Input.

This is used when the ADC Test Mode is configured as fixed. See the enable_test_mode method above.

Parameters:

pattern (list(int)) – List of four integer values to be applied

status_check()

Perform status check.

Returns:

Status