HPS Low Level Devices
Resampler and Delay Tracker
PST 4K Channelizer
Packet Stream Repair
Test Vector Generator
PST Sync Buffer
PST Beam Summer
PST Packetizer
Host LUT
Ref: Mid.CBF SW Control for PST Beamforming for AA1
Resampler and Delay Tracker
FW IP Block: https://gitlab.drao.nrc.ca/SKA/Mid.CBF/FW/ip/resampler_delay_tracker.git
Device Server: https://gitlab.drao.nrc.ca/digital-systems/software/applications/ds-resampler-delay-tracker
PST 4K Channelizer
FW IP Block: https://gitlab.drao.nrc.ca/SKA/Mid.CBF/FW/ip/pstc_ch4k
Attributes
{
"name": "gain",
"desc": "Gain for each channel in the 4K channelizer. This value is split\ninto the shift and scale factors that are then written\nto the respective FPGA registers.",
"attributeType": "Image",
"maxXSize": 4096,
"maxYSize": 2,
"tangoDataType": "DevDouble",
"tangoReadWriteType": "READ_WRITE",
"tangoAttributeProperties":
{
"minValue": 0.0,
"maxValue": "TBD"
}
},
{
"name": "PSTC_SFT",
"attributeType": "Image",
"maxXSize": 4096,
"maxYSize": 2,
"tangoDataType": "DevULong",
"tangoReadWriteType": "READ",
"tangoAttributeProperties":
{
"minValue": 0,
"maxValue": 15
},
"registerLink":
{
"registerSetName": "pstc_ch4k",
"registerName": "Config_PSTC_Sft_Scl",
"registerFieldName": "PSTC_SFT"
}
},
{
"name": "PSTC_SCL",
"attributeType": "Image",
"maxXSize": 4096,
"maxYSize": 2,
"tangoDataType": "DevULong",
"tangoReadWriteType": "READ",
"tangoAttributeProperties":
{
"minValue": 0,
"maxValue": 65535
},
"registerLink":
{
"registerSetName": "pstc_ch4k",
"registerName": "Config_PSTC_Sft_Scl",
"registerFieldName": "PSTC_SCL"
}
}
Similar to 16K Channeliser ic_ch16k.tango.json
Packet Stream Repair
FW IP Block: https://gitlab.drao.nrc.ca/SKA/Mid.CBF/FW/ip/packet_stream_repair.git
Device Server: https://gitlab.drao.nrc.ca/digital-systems/software/applications/ds-packet-stream-repair
Test Vector Generator
FW IP Block: https://gitlab.drao.nrc.ca/digital-systems/fpga/blocks/tst_vector_gen/-/blob/initial_setup/doc/tst_vector_gen.rst
stream_test_pattern_generator.json
Assumption: one device server with 8 register sets (one per VCC)
Commands
{
"name": "reset",
"desc": "Sets the configuration settings to default",
"inputArgType": "DevVoid",
"outputArgType":"DevVoid"
},
{
"name":"configure",
"desc":"Command to configure the Test Vector Generator",
"abstract":false,
"inputArgDesc":"JSON configuration string",
"inputArgType":"DevString",
"outputArgDesc":"Return code from config command execution:\n 0. No errors\n 1. JSON parse error\n 2. ...",
"outputArgType":"DevEnum",
"description": "Command execution return code",
"excludedStates":["DISABLE"]
},
{
"name": "start_generation",
"desc": "",
"inputArgType": "DevVoid",
"outputArgType":"DevVoid"
},
{
"name": "stop_generation",
"desc": "",
"inputArgType": "DevVoid",
"outputArgType":"DevVoid"
}
Configure Command JSON string example:
{
[
{
"vcc": 1,
"delay": 516,
"real":
{
"initial_value": 1234,
"pattern": "ramp-up",
"increment": 1
}
"imaginary":
{
"initial_value": 1234,
"pattern": "ramp-up",
"increment": 5
}
},
{
"vcc": 2,
"delay": 200,
"real":
{
"initial_value": 100,
"pattern": "flat"
}
"imaginary":
{
"initial_value": -50,
"pattern": "ramp-down",
"increment": 2
}
}
]
}
PST Sync Buffer
FW IP Block https://gitlab.drao.nrc.ca/digital-systems/fpga/blocks/pst_sync_buffer
Attributes
{
"name": "dwell_time",
"desc": "Maximum wait time before reading out the data",
"attributeType": "Scalar",
"tangoDataType": "DevDouble",
"tangoReadWriteType": "READ_WRITE",
"units": "ms?",
"tangoAttributeProperties":
{
"minValue": 0.0,
"maxValue": "TBD"
},
},
{
"name": "input_snap_en",
"desc": "Setting this bit to 1 snapshots the timestamp on all the incoming streams in the write_timestamp_snap registers",
"attributeType": "Scalar",
"tangoDataType": "DevBoolean",
"tangoReadWriteType": "READ_WRITE",
"default": "false"
},
{
"name": "output_snap_en",
"desc": "Setting this bit to 1 snapshots the timestamp on the outgoing stream in the read_timestamp_snap register",
"attributeType": "Scalar",
"tangoDataType": "DevBoolean",
"tangoReadWriteType": "READ_WRITE",
"default": "false"
},
{
"name": "under_run_status",
"desc": "bits[7:0] under run status where read timestamp > write timestamp, sticky bits",
"attributeType": "Scalar",
"tangoDataType": "DevULong",
"tangoReadWriteType": "READ"
},
{
"name": "over_run_status",
"desc": "sticky bit"
"attributeType": "Scalar",
"tangoDataType": "DevBoolean",
"tangoReadWriteType": "READ"
},
{
"name": "write_timestamp_snap_out",
"attributeType": "Spectrum",
"maxXSize": 8,
"tangoDataType": "DevULong64",
"tangoReadWriteType": "READ"
},
{
"name": "read_timestamp_snap_out",
"attributeType": "Scalar",
"tangoDataType": "DevULong64",
"tangoReadWriteType": "READ"
},
{
"name": "first_write_timestamp_out",
"attributeType": "Spectrum",
"maxXSize": 8,
"tangoDataType": "DevULong64",
"tangoReadWriteType": "READ"
}
TBD:
dwell_time – units ms? sample rate used to convert between time and number of samples?
first_write_timestamp_out – similar to corner turner in the correlator…
read_timestamp_snap_out – for debugging
write_timestamp_snap_out – for debugging
Commands
{
"name": "reset",
"desc": "resets the sync buffer including timestamp fields, and clears the over/under run status",
"inputArgType": "DevVoid",
"outputArgType":"DevVoid"
},
{
"name": "clear_over_under_run_status",
"desc": "",
"inputArgType": "DevVoid",
"outputArgType":"DevVoid"
}
TBD:
reset – when should this command be used?
PST Beam Summer
FW IP Block https://gitlab.drao.nrc.ca/digital-systems/fpga/blocks/pst_beam_summer
Attributes
{
"name": "vcc_ids",
"desc": "The 1-indexed list of vcc_ids are converted to the corresponding 0-indexed bits of the control register to indicate which VCC samples are included in the beam sum.",
"attributeType": "Spectrum",
"maxXSize": 8,
"tangoDataType": "DevULong",
"tangoReadWriteType": "READ_WRITE",
"tangoAttributeProperties":
{
"minValue": 1,
"maxValue": 8
}
},
{
"name": "overflow_status",
"desc": "1 -> True",
"attributeType": "Scalar",
"tangoDataType": "DevBoolean",
"tangoReadWriteType": "READ"
}
Commands
{
"name": "clear_overflow",
"desc": "",
"inputArgType":"DevVoid",
"outputArgType":"DevVoid"
}
PST Packetizer
FW IP Block https://gitlab.drao.nrc.ca/digital-systems/fpga/blocks/pst_packetiser
Attributes
{
"name": "meta_channel_separation",
"desc": "A 32-bit unsigned integer Channel Separation field that identifies the frequency spacing between channels in the packet in units of mHz. The maximum frequency that can be represented is ~4.3MHz. This value is only used to set the Channel Separation field in the UDP payload meta data.",
"attribute": "Scalar",
"tangoDataType": "DevDouble",
"tangoReadWriteType": "READ",
"units": "Hz",
"tangoAttributeProperties":
{
"minValue": 53.0e3,
"maxValue": 4.3e6
}
},
{
"name": "meta_channel_packet_frequency_increment",
"desc": "The frequency increment in Hz between packets. For info. Constant for AA1",
"attribute": "Scalar",
"tangoDataType": "DevDouble",
"tangoReadWriteType": "READ",
"units": "Hz",
},
{
"name": "meta_first_channel_frequency",
"desc": "First channel frequency field that identifies the channel centre frequency of the First Channel Number in units of mHz. This value is used to determine and set the UDP meta data First Channel Frequency field.",
"attribute": "Scalar",
"tangoDataType": "DevDouble",
"tangoReadWriteType": "READ_WRITE",
"units": "Hz",
"tangoAttributeProperties":
{
"minValue": "TBD",
"maxValue": "TBD"
}
},
{
"name": "meta_beam_number",
"desc": "A 16-bit unsigned integer Beam Number will identify the beam (of 16 possible beams for PST and 1500 for Mid.PSS) to which the data in the packet belongs. This value is used in the lookup for the host ID and to set the Beam Number field in the UDP payload meta data. One beam for AA1",
"attribute": "Scalar",
"tangoDataType": "DevULong",
"tangoReadWriteType": "READ_WRITE",
"tangoAttributeProperties":
{
"minValue": 0,
"maxValue": 0
}
},
{
"name": "meta_scan_id",
"desc": "A 64-bit unsigned integer Scan ID field is provided by LMC and included by CBF in the packet so that the pulsar processor can independently check the observational parameters of the current beam data. This value is only used to set the Scan ID field in the UDP payload meta data.",
"attribute": "Scalar",
"tangoDataType": "DevULong64",
"tangoReadWriteType": "READ_WRITE",
"tangoAttributeProperties":
{
"minValue": 0,
"maxValue": 0xffffffffffffffff
}
}
meta_first_channel_frequency – depends on which frequency slice is being used; calculated in HPS FSP_PST
Constants
meta_channel_separation = 220,200,960*9/10*8/7/4096 = 55296 Hz = 55,296,000 mHz (TBC)
meta_channel_packet_frequency_increment (fixed for AA1) = 185 channels * 55,296 Hz = 10,229,760 Hz = 10,229,760,000 mHz
meta_magic_word =
0xabacadab
Operation
Set all attributes during configure scan, then done
Host LUT
https://gitlab.drao.nrc.ca/digital-systems/software/applications/ds-host-lut-stage-1
https://gitlab.drao.nrc.ca/digital-systems/software/applications/ds-host-lut-stage-2
{
}
TBD: based on software for visibilities, but no ARP?