Overview

The Mid CBF Engineering Console is intended for integration and testing of the Mid CBF MCS and the Talon DX hardware.

As required, the Engineering Console will:

  • Provide emulation of LMC control of MCS

  • Provide intrusive tools to monitor and control Mid CBF

  • Access to configuration-managed FPGA bitstreams and Talon DX binaries for deployment to Mid CBF

See MCS-Talon Integration for further details of the integration and test work as it evolves.

Note: MCS does not currently allow its LMC interface to be externally exercised – i.e., it needs to exercised from within the Kubernetes cluster. MCS commands can be issues via an iTango3 shell running in the MCS cluster – see Engineering Console README for details.

System Context

The following diagram shows the Mid.CBF Engineering Console as it fits into the rest of the CSP Mid system.

_images/engineering-console-context.png

Engineering Console System Context

Interfaces

# TODO

On Command Sequence

The On command sequence shown in the diagram below is used to automatically power on the Talon-DX boards, copy the appropriate FPGA bitsteam and HPS device server binaries to the Talon-DX boards and start the device servers on the HPS of each board. The sequence is as follows:

  1. Download artefacts (bitstreams and binaries) from the Central Artefact Repository , and build the MCS Docker container after downloading. Optional: Override the DS artefacts with local builds.

  2. Configure the MCS Tango database to add entries for the HPS device servers and the log consumer.

  3. Use the LMC script to send the On command to the CbfController.

  4. The CbfController propagates the On command to the TalonLRU Tango device, which then propagates it to the PowerSwitch device.

  5. The PowerSwitch device communicates with the power switch hardware over HTTP, requesting power on of specific outlets.

  6. The power switch hardware switches the requested outlets on and responds to the PowerSwitch device.

  7. The result of the TalonLRU On command is propagated back to the CbfController.

  8. CbfController reads the JSON configuration file in the artefacts folder to detemine which Talon-DX boards it needs to configure.

  9. FPGA bitstreams and device server binaries are copied to each Talon-DX board.

  10. The CbfController runs the hps_master_run.sh script on each Talon-DX board to start the HPS Master.

  11. The HPS Master device server is started on each Talon-DX board using the copied binary.

  12. The configure command is send to each HPS Master device server.

  13. The HPS Master device server programs the FPGA with the bitstream and starts the remaining HPS devices on each board.

  14. HPS Master responds with success/fail result of the configure command.

For a description of how to run this sequence of steps see the Configure the Talon-DX Boards from MCS section.

_images/on-command-sequence.png

MCS On Command Sequence

@startuml test skinparam backgroundColor #EEEBDC skinparam sequence { ParticipantBorderColor DodgerBlue ParticipantBackgroundColor DeepSkyBlue ActorBorderColor DarkGreen ActorBackgroundColor Green BoxBorderColor LightBlue BoxBackgroundColor #F0FFFF } actor "User" as User participant "Engineering\nConsole" as Eng box "MCS\n(minikube)" participant "CBF\nController" as CbfCtrl participant "Talon\nLRU" as LRU participant "Power\nSwitch" as PwrSwitch database "Tango\nDB" as DB end box box "Talon DX" participant "OS" as OS participant "HPS\nMaster" as HPS participant "FPGA" as FPGA collections "Tango\nDevices" as TangoDS end box User -> Eng: **download-artifacts** Eng -> CbfCtrl: //copy artefacts// User -> Eng: **config-db** Eng -> DB: //add HPS Tango devices// User -> CbfCtrl: **On()** CbfCtrl -> LRU: LRU -> PwrSwitch: PwrSwitch -> LRU: CbfCtrl -> OS: //copy artefacts// CbfCtrl -> HPS ** : start CbfCtrl -> HPS ++ : **configure** HPS -> FPGA: program bitstream HPS -> TangoDS ** : start TangoDS -> HPS: running HPS -> CbfCtrl -- : success @enduml

VCC Scan Sequence

Once the system has been turned on using the above sequence, it can be configured for a scan operation. The following diagram shows the flow of scan configuration and execution for a single VCC unit.

For a description of how to run this sequence of steps see the Configure and Execute a VCC Scan section.

@startuml test skinparam backgroundColor #EEEBDC skinparam sequence { ParticipantBorderColor DodgerBlue ParticipantBackgroundColor DeepSkyBlue ActorBorderColor DarkGreen ActorBackgroundColor Green BoxBorderColor LightBlue BoxBackgroundColor #F0FFFF } actor "User" as User box "MCS\n(minikube)" participant "CBF\nSubarray" as CbfSub participant "Vcc" end box box "Talon DX" participant "DsVccController" as VccCntr participant "DsVccBand1And2" as VccB12 participant "FPGA" as FPGA collections "Low-Level Tango\nDevices" as TangoDS end box User -> CbfSub: ** ConfigureScan(config_json) ** CbfSub -> Vcc: ** ConfigureBand("1") ** Vcc -> VccCntr: ** ConfigureBand("1") ** VccCntr -> FPGA: // program bitstream band 1 // VccCntr -> VccB12: ** On() ** VccB12 -> VccCntr: success VccCntr -> Vcc: success Vcc -> CbfSub: success CbfSub -> Vcc: ** ConfigureScan(config_json) ** Vcc -> VccB12: ** SetInternalParameters(param_json) ** VccB12 -> TangoDS: // set relevant attributes // VccB12 -> Vcc: success Vcc -> VccB12: ** ConfigureScan(config_json) ** VccB12 -> TangoDS: // propagate parameters // VccB12 -> Vcc: success Vcc -> CbfSub: success CbfSub -> User: success User -> CbfSub: ** Scan(scan_id) ** CbfSub -> Vcc: ** Scan(scan_id) ** Vcc -> VccB12: ** Scan(scan_id) ** VccB12 -> Vcc: scan started successfully Vcc -> CbfSub: scan started successfully CbfSub -> User: scan started successfully @enduml