.. _library_components:

############################
Example Generated Components
############################

Required Libraries
##################

 ============= =================== ===========================================================================
  Name          VHDL Library Name   From
 ============= =================== ===========================================================================
  axi4          axi4_lib            https://gitlab.stfc.ac.uk/tech-esdg/common-libraries/lib_stfc/axi4
 ============= =================== ===========================================================================

In addition to generated files, the following :term:`VHDL` files are required to be added to the final
design:

 * ``axi4/src/vhdl_packages/axi4lite_pkg.vhd``
 * ``axi4/src/vhdl/axi4_lite_slave_logic.vhd``


.. include:: ./components/axi4lite_REGISTERMAP_XML_NODENAME.inc

.. include:: ./components/axi4lite_REGISTERMAP_XML_NODENAME_muxdemux.inc
    
.. include:: ./components/axi4lite_IC_XML_NODENAME_ic.inc