vd_datagen module

Virtual Digitiser Data Generation ICL (abstraction)

vd_datagen.CONFIG_BUF_WORDS = 131072

Size of a full configuration buffer. Also the offset for second half of the double-buffer.

vd_datagen.DELAY_POLY_COEFFS = 6

Number of Delay Polynomial Coefficients

class vd_datagen.DataGenerator(*args: Any, **kwargs: Any)

Bases: FpgaPeripheral

Virtual Digitiser Data Generator configuration

__init__(driver: ska_low_cbf_fpga.ArgsFpgaDriver, map_field_info: Dict[str, ska_low_cbf_fpga.args_map.ArgsFieldInfo], **kwargs)

property buf0_valid: ska_low_cbf_fpga.IclField.<class 'bool'>

property buf1_valid: ska_low_cbf_fpga.IclField.<class 'bool'>

property configuration: ska_low_cbf_fpga.IclField.<class 'str'>

Get the last written configuration (JSON).

If no configuration has been written since software start-up, you will get a silly answer (second half of double buffer).

property configuration0: ska_low_cbf_fpga.IclField.<class 'str'>

Get configuration buffer 0 (JSON).

property configuration1: ska_low_cbf_fpga.IclField.<class 'str'>

Get configuration buffer 1 (JSON).

configure(sources: List[Source]) → None

Configure all VD data generator sources.

Note: Both buffers will be marked as invalid. User expected to call configure_next_delay_polynomials after calling here.

Parameters:

sources – one source object per VD source

configure_from_yaml(configuration: dict) → None

Configure the Virtual Digitiser’s Data Generator.

Parameters:

configuration – dictionary created from YAML

configure_next_delay_polynomials(polynomials: List[List[float]], activation_time: int, data_start_sec: int = 0, data_start_ns: int = 0) → None

Configure the entire set of delay polynomials to use at the next activation time.

You must supply exactly one polynomial per source, in order.

Parameters:

• polynomials – one polynomial per source - see set_delay_polynomial

• activation_time – datagen time at which this set of polynomials will activate

• data_start_sec – vd datagen start seconds, used only after reset

• data_start_ns – vd_datagen start nanoseconds, used only after reset

read_time() → float

Get current data-generator time

set_delay_polynomial(source: int, polynomial, buffer) → None

Set a delay polynomial for a single source.

Parameters:

• source – 0 indexed entry in spead_shared_ram.

• polynomial – coefficients [c0,c1,c2,c3,c4,c5] delay = c0 + c1*t + … + c5*t^5 units of nanoseconds per second^[0,1,2,3,4,5]

• buffer – 0/1 (double buffered configuration)

class vd_datagen.Source(tone: bool, channel_frequency: float, scale: int, delay_polynomial: Sized = <factory>, seed: int = 0, fine_frequency: int = 0)

Bases: object

__init__(tone: bool, channel_frequency: float, scale: int, delay_polynomial: ~typing.Sized = <factory>, seed: int = 0, fine_frequency: int = 0) → None

as_registers()

channel_frequency: float

SPS SPEAD channel centre frequency (GHz)

delay_polynomial: Sized

fine_frequency: int = 0

in steps of 28.257Hz, applies when tone=True

classmethod from_registers(registers: numpy.ndarray)

Create a Source object from a row of registers in the configuration table.

Parameters:

registers – a slice of SOURCE_CONFIG_WORDS registers

Returns:

Source object derived from supplied registers

scale: int

Scale factor: [-16384,16384] for sinusoids, [-1020,1020] for noise

seed: int = 0

RNG seed, applies when tone=False

tone: bool

True = Sinusoid, False = Noise

vd_datagen.null_polynomial()

vd_datagen.pad_source_list(sources: List[Source], desired_length: int)