Cheetah - SKA - PSS - Prototype Time Domain Search Pipeline
Ddtr.h
1 /*
2  * The MIT License (MIT)
3  *
4  * Copyright (c) 2016 The SKA organisation
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in all
14  * copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22  * SOFTWARE.
23  */
24 #ifndef SKA_CHEETAH_DDTR_FPGA_DDTR_H
25 #define SKA_CHEETAH_DDTR_FPGA_DDTR_H
26 
27 #include "cheetah/ddtr/fpga/DdtrWorker.h"
28 #include "cheetah/ddtr/fpga/Config.h"
29 #include "cheetah/ddtr/Config.h"
30 #include "cheetah/ddtr/detail/CommonTypes.h"
31 #include "cheetah/utils/Architectures.h"
32 #include "panda/DeviceLocal.h"
33 #include "panda/arch/altera/Fpga.h"
34 #include <memory>
35 
36 namespace ska {
37 namespace cheetah {
38 namespace ddtr {
39 namespace fpga {
40 
46 template<typename DdtrTraits>
47 class Ddtr
48 {
49  public:
50  typedef typename cheetah::Fpga Architecture;
51  typedef ddtr::fpga::Config Config;
52 
53  private:
54  typedef typename DdtrTraits::ConfigType ConfigType;
55  typedef typename DdtrTraits::DmTrialsType DmTrialsType;
56  typedef typename DdtrTraits::BufferFillerType BufferFillerType;
57  typedef typename DdtrTraits::TimeFrequencyType TimeFrequencyType;
58  typedef typename DdtrTraits::BufferType BufferType;
59  typedef typename DdtrTraits::DedispersionHandler DedispersionHandler;
60 
61  typedef std::vector<ddtr::Config::Dm> DmListType;
62  typedef ddtr::Config::Dm Dm;
63  typedef typename TimeFrequencyType::FrequencyType FrequencyType;
64  typedef typename TimeFrequencyType::TimeType TimeType;
65 
66  public:
67  Ddtr(ConfigType const&);
68  Ddtr(Ddtr&&);
69  Ddtr(Ddtr const&) = delete;
70  ~Ddtr();
71 
72  template<typename TimeFrequencyT>
73  void operator()(TimeFrequencyT const& input);
74  void operator()(panda::PoolResource<Architecture>& device, BufferType const& data);
75 
76  protected:
77  void init(TimeFrequencyType const&);
78 
79  private:
80  struct WorkerFactory {
81  public:
82  WorkerFactory(ddtr::Config const&);
83 
84  DdtrWorker<BufferType, DmTrialsType>* operator()(panda::PoolResource<Architecture> const& device) {
85  return new DdtrWorker<BufferType, DmTrialsType>(_config, device);
86  }
87 
88 
89  private:
90  ddtr::Config const& _config;
91  };
92 
93  private:
94  bool _first_call;
95  DedispersionHandler _dedispersion_handler;
96  panda::DeviceLocal<panda::PoolResource<Architecture>, WorkerFactory> _workers;
97  std::unique_ptr<BufferFillerType> _agg_buffer_filler_ptr;
98  std::size_t _max_delay;
99  std::size_t _dedispersion_samples;
100  ddtr::Config const& _config;
101  std::vector<double> _dm_factors;
102  std::size_t _dev_memory;
103 };
104 
105 
106 } // namespace fpga
107 } // namespace ddtr
108 } // namespace cheetah
109 } // namespace ska
110 #include "cheetah/ddtr/fpga/detail/Ddtr.cpp"
111 #endif // SKA_CHEETAH_DDTR_FPGA_DDTR_H
Execute the ddtr kernel on a specific device.
Definition: DdtrWorker.h:48
Interface for the Altera fpga algorithm.
Definition: Ddtr.h:47
Some limits and constants for FLDO.
Definition: Brdz.h:35